BCD to seven segment decoder Verilog HDL project.

BCD stands for binary coded decimal. It is speatial types of 4(quard bit) bit representation of a number. Such as if a number in decimal 12 it is represented by BCD as 00010010.

7 segment display have so many application. Though now a day digital display LCD, LED used widely but for low price application 7 segment display widely used. For students project ( MCU related project) it is widely used. BCD to seven segment decoder are designed in verilog HDL. Core are given bellow.

module Seven_Seg_Display_V2001 (
output reg [6: 0] Display,
input [3: 0] BCD
);
// abc_defg
parameter BLANK = 7’b000_0000;
parameter ZERO = 7’b111_1110; // h7e
parameter ONE = 7’b011_0000; // h30
parameter TWO = 7’b110_1101; // h6d
parameter THREE = 7’b111_1001; // h79
parameter FOUR = 7’b011_0011; // h33
parameter FIVE = 7’b101_1011; // h5b
parameter SIX = 7’b101_1111; // h5f
parameter SEVEN = 7’b111_0000; // h70
parameter EIGHT = 7’b111_1111; // h7f
parameter NINE = 7’b111_1011; // h7b
always @ (BCD)
case (BCD)
0: Display = ZERO;
1: Display = ONE;
2: Display = TWO;
3: Display = THREE;
4: Display = FOUR;
5: Display = FIVE;
6: Display = SIX;
7: Display = SEVEN;
8: Display = EIGHT;
9: Display = NINE;
default: Display = BLANK;
endcase
endmodule
module t_Seven_Seg_Display_V2001 ();
wire [6: 0] Display;
reg [3: 0] BCD;
parameter BLANK = 7’b000_0000;
parameter ZERO = 7’b111_1110; // h7e
parameter ONE = 7’b011_0000; // h30
parameter TWO = 7’b110_1101; // h6d
parameter THREE = 7’b111_1001; // h79
parameter FOUR = 7’b011_0011; // h33
parameter FIVE = 7’b101_1011; // h5b
parameter SIX = 7’b001_1111; // h1f
parameter SEVEN = 7’b111_0000; // h70
parameter EIGHT = 7’b111_1111; // h7f
parameter NINE = 7’b111_1011; // h7b
initial #120 $finish;
initial fork
#10 BCD = 0;
#20 BCD = 1;
#30 BCD = 2;
#40 BCD = 3;
#50 BCD = 4;
#60 BCD = 5;
#70 BCD = 6;
#80 BCD = 7;
#90 BCD = 8;
#100 BCD = 9;
join
Seven_Seg_Display_V2001 M0 (Display, BCD);
endmodule